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Getting to 5G: Importance of Data Plane Acceleration
In part one of this series, we explored networking slicing and virtualization, as well as their importance to 5G. Part one examined the challenges and requirements for networking management in this new world of 5G and what capabilities such infrastructure would need. Part two concludes with a discussion of bringing 5G to life using data plane acceleration based on FPGA-based SmartNICs.
A New Data Processing Paradigm
When working to make 5G a reality, it’s important to stay rooted in reality. Since the throughput and latency demands of today’s applications are so high, there’s no guarantee that applications in software on standard platforms will be able to meet those demands without allotting significant CPU resources to address the issue.
With the documented demise of Moore’s Law, operators realized SDN/NFV/5G network slicing’s promise of cost savings and increased revenues, where offset by the need to deploy entire racks of computing resources for a problem that a dedicated network appliance could previously support.
The CPU, server costs, rack space, and power required to meet the same performance footprint of a dedicated solution end up being as or more expensive than custom-designed alternatives. The vision of operational simplicity and dramatically lower total cost of ownership are still a dream. Operators see that in order to scale applications in 5G virtualized networks to meet performance goals, they will need a new data processing paradigm to realize the requirements that network slicing places on network infrastructure.
Acceleration and Workload Requirements
From a workload perspective, latency, security, encryption/decryption, flow processing, application (VFN) processing, networking QoS guarantees, and network monitoring are all different. Different workloads require different processing strategies. A “one-size-fits-all” approach has been proven to be a failure. To support the networking requirements that network slicing in virtualized environments requires looking at solutions from a different perspective.
Operators have come to understand that if they intend to scale virtualized networking functions (VNFs) to meet performance goals and transparently provide network slicing, they will need data plane acceleration based on FPGA-based SmartNICs. This technique offloads the x86 processors that are hosting the varied service applications to support the breadth of services promised.
Operators will also need to place workloads on the correct processor type at the correct location in networks. The proven approach to this problem is to offer data plane acceleration based on FPGA-based SmartNICs tightly coupled with general-purpose processors. This technique offloads the x86 processors that are hosting varied applications for other varied functions to support the breadth of services promised. Functionality required by 5G network slicing is network-centric, by definition. These networking and security workloads are poor prospects for general-purpose architectures.
An appropriate architecture places those networking workloads close to the physical infrastructure on FPGA-based SmartNICs and alleviates those workloads from general CPUs, allowing them to support the monetizable 5G applications. Software-configurable, FPGA-based SmartNICs specialize in functions like virtual switching, flow classification, filtering, intelligent load balancing, QoS, and encryption/decryption, which can all be performed in the SmartNIC and offloaded from the x86 processor housing the 5G applications.
With technologies like VirtIO, these functions can be transparent to the application, providing a common management and orchestration layer to the network fabric for network slicing. Coupling FPGA-based SmartNICs with general-purpose x86 or ARM processors in a workload-specific architecture will allow operators to realize the vision that 5G and network slicing promise.
Flexibility is Key
Virtual switching supported by SmartNIC acceleration is the highest-performing and most secure method of deploying virtualized applications. Virtual machines (VMs) can use accelerated packet I/O and guaranteed traffic isolation via hardware while maintaining standards-based vSwitch functionality. FPGA-based SmartNICs specialize in the hardware-based match/action processing required for vSwitches and can also offload critical security processing, freeing up CPU resources for virtualized applications.
Beyond the above-mentioned examples, custom offloads that are specific to the virtualized application and require acceleration can be implemented in the FPGA SmartNIC via standard APIs. This level of complete flexibility provides a workload-specific processing architecture where specific tasks are split between the host x86 processor and the FPGA.
Current security and networking solutions – expensive and hardened – simply will not suffice. Overcoming the challenges of virtualized deployments that require network slicing need reconfigurable computing platforms based on standard servers. These servers will be capable of offloading and accelerating compute-intensive workloads, either in an inline or look-aside model. This will appropriately distribute workloads between x86 general-purpose processors and software-reconfigurable, FPGA-based SmartNICs optimized for virtualized environments.
Laying the Groundwork for the Future
When operators join FPGA-based SmartNICs with COTS server platforms, they lay the groundwork for network applications to operate at hundreds of gigabits/second of throughput with support for many millions of simultaneous flows. It’s a workload-specific and multi-tiered processing architecture that encourages more cautious operators to implement NFV and to bringing the future to life.